Part No
Aardvark I2C
Part No:MPINTER-USBAL-Seres-USB2.0
Description:
Pocket-sized USB 2.0 LS/FS/HS Protocol Analyzer with OTG decoding. FPGA-based, fully upgradeable design.
Real-time data capture and display. PC software included. Free, lifetime
software upgrades. World-wide shipping.
Pocket-sized USB 2.0 LS/FS/HS Protocol Analyzer with OTG
decoding. FPGA-based, fully upgradeable design. Real-time data capture and
display. PC software included. Free, lifetime software upgrades. World-wide
shipping.
The Seres USB 2.0 Protocol Analyzer with OTG
decoding is specifically designed for the road-warrior. It will easily slip
into your coat pocket or laptop bag for those trips where bringing a large
USB analyzer is not convenient. The physical format is only 100mm x 120mm x
30mm, making it slightly larger than a pen or a computer mouse. The
enclosure is made out of very high-quality brushed aluminum.
The data captured is in real-time transferred to the
Analysis PC where it is analyzed and displayed by the PC Software. The USB
Analyzer has no limitation of the data size captured as data is streamed in
real-time directly from the link under test into the PC application^s tree
view display. This allows you to capture many hundreds of MB of data (only
limited to the size of RAM in your analysis PC).
This Seres USB 2.0 Protocol Analyzer contains a 32MB FIFO buffer SDRAM that
smooths out bursty traffic such that temporarily bursty traffic on the link
under test will not cause the USB Analyzer-to-Analysis PC link to be
saturated. The sustained maximum capture speed to the analysis PC largely
depends on the speed of the capture PC. As a rule of thumb, as long as the
throughput on the link under test is under 15 MB / s then the analysis PC
will keep up with the captured data speed without the buffer FIFO filling
up. Note that this USB Analyzer will never lose captured data
(regardless if the link under test is saturated) since the captured data is
always buffered in the SDRAM FIFO before being sent to the analysis PC.
This USB Protocol Analyzer is FPGA-based which
makes it fully programmable with each new software upgrade. This allows us
to fully remotely deploy logic and software upgrades, if needed. This means
that you will never need to send your hardware to us for upgrade as more
advanced software like class decoders are purchased.
The PC Analysis Software displays data as it is
received from the USB Analyzer hardware so you will not have to wait for
lengthy data decoding before you can start analyzing the captured data. As
USB Transactions and Packets are captured, they will be decoded and added to
the tree view in the PC Analysis software. This makes it very easy to
understand the sequence of events in the captured data. Detail views display
the details for selected Transactions and Packets in the tree view as they
are clicked on. The PC Analysis software also decodes payload data in hex
format and displays it in the hex view pane.
To learn more about the PC Analysis Software, click
here. The USB analysis software is free. It includes sample LS, FS and
HS data files that can be viewed in the software, enabling you to get
familiar with the Software before buying the USB Analyzer hardware.
What’s in the box?
- Seres USB 2.0 Protocol Analyzer .
- Two 1m / 3ft USB 2.0 cables.
- Installation CD containing drivers and
software.
Technical Specifications
|
LS/FS/HS USB Protocol Analyzer Technical
Specifications. |
| Supported USB
Standards |
USB 1.0, USB 1.1, USB
2.0, OTG 1.3 |
| Supported USB Speeds |
It automatically detects device connection in high speed (480 Mbps),
full speed (12 Mbps), and low speed (1.5 Mbps).
Note: HS Devices are initially connected as FS devices. Only after
successfully having completed the Device and Host Chirp Sequences do
HS-capable devices enter HS mode. This Seres USB 2.0 Protocol
Analyzer fully supports automatic
detection of both Device and Host Chirp. |
| Maximum recorded data
length |
Unlimited. Only the
available disk and memory of the Analysis PC limits how much data
can be captured and analyzed. |
| Built in FIFO buffer |
32 MB. The FIFO buffer
is used to smooth out the data stream captured from the Link Under
Test. Note that the FIFO buffer will fill up if the Analysis PC is
unable to read out data fast enough from the Seres USB 2.0 Protocol
Analyzer . In this case,
the recording will automatically stop and the PC application will
display the captured data up until the point where the FIFO filled
up. |
| Analysis PC Interface |
USB 2.0 Type 〝B〞
Connector |
| Link Under Test
Interface |
USB 2.0 Type 〝A〞 and 〝B〞 Connectors. |
| LED Indicators |
- Host Power: Indicates when the Seres
USB 2.0 Protocol Analyzer
unit is powered and the Analysis PC Device Drivers have been
installed.
- Link Power: Indicates that the Link
Under Test is powered by the Host.
- Link Activity: Indicates when link
activity is detected.
|
| Captured bus events
and packets |
All bus activity down
to the smallest detail is captured and stored into the .usb file
when recording. The Software displays all the captured
information from the lowest link level up to the highest protocol
level. In addition the VBus voltage is continuously monitored and
stored in the capture file. For
detailed information of the captured data, please see the datasheet
for the
NXP ISP1505A USB Transceiver. |
| Displayed Bus Events |
LS Device Connection,
FS Device Connection, HS Device Connection, Device Reset, Device
Chirp, Host Chirp, Device Disconnection, HS Idle, Keep-Alives, OTG
Session Request Protocol, OTG Host Negotiation Protocol and OTG VBus
events. |
| Displayed Packets. |
SETUP, IN, OUT, SOF,
DATA0, DATA1, DATA2, MDATA, ACK, NAK, NYET, STALL, PING, SPLIT, PRE. |
| Displayed
Transactions. |
SETUP Transaction, IN
Transaction, OUT Transaction, PING Transactions, SPLIT Transactions. |
| Decoded Device
Requests |
CLEAR_FEATURE,
SET_FEATURE, SET_ADDRESS, GET_DESCRIPTOR, SET_DESCRIPTOR, GET_STATUS,
GET_CONFIGURATION, SET_CONFIGURATION, GET_INTERFACE, SET_INTERFACE,
SYNCH_FRAME.
Note: All Device Requests are captured and displayed but only
standard Device Requests are decoded. I.e., non-standard Device
Requests (not listed above) will be displayed in hexadecimal form. |
| Decoded Descriptors |
Device Descriptor,
Configuration Descriptor, Interface Descriptor, Endpoint Descriptor,
String Descriptor, Device_Qualifier Descriptor, Other_Speed_Configuration
Descriptor and OTG Descriptor.
Note: Class-specific descriptors are currently not decoded but
instead displayed in hexadecimal form. Class Decoders, sold
separately when available, will fully decode related class-specific
descriptors. |
| Packet Integrity
Checked |
- Token Packets: PID and CRC-5 errors are
flagged as invalid.
- Data Packets: CRC-16 errors are flagged
as invalid.
|
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